Metal layer assignment
US6182272A · kind A · utility
217Cited by
27References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 16, 1998 |
| Grant date | Jan 30, 2001 |
| Priority date | — |
| Expiry date | Jul 16, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/394
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Routing layers are assigned to connection segments in integrated circuit design. A routing description that includes connection segments and a vertex where at least two of the connection segments connect to each other is obtained. A penalty is determined for the vertex based on a potential layer assignment combination for the connection segments that connect at the vertex, and routing layers are assigned to the connection segments based on the determined penalty.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.