Method for manufacturing lead-on-chip (LOC) semiconductor packages using liquid adhesive applied under the leads
US6183589A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 1998 |
| Grant date | Feb 6, 2001 |
| Priority date | — |
| Expiry date | Mar 6, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T156/17
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing lead-on-chip (LOC) semiconductor packages includes steps of preparing a lead frame having inner leads and outer leads, and applying a liquid adhesive having a certain viscosity to the bottom surfaces of the inner leads. The method also includes positioning a semiconductor chip under the lead frame, to expose electrode pads through the space defined between opposing rows of inner leads. The inner leads are then attached to the active surface of the semiconductor chip by means of the liquid adhesive. The adhesive applying step may be carried out using a tool having discharge projections through which liquid adhesive is discharged from a reservoir. The liquid adhesive under the lead frame may be cured and then turned into a solid adhesive layer by thermocompression. The liquid adhesive is a thermosetting resin or a thermoplastic resin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.