Substrate for high frequency integrated circuits
US6183857A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 1998 |
| Grant date | Feb 6, 2001 |
| Priority date | — |
| Expiry date | Jun 17, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/259
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A silicon substrate material based on silicon has a semi-insulating interior layer isolating the bulk of the substrate material from the top layers, where integrated circuits are to be built. The semi-insulating layer is created by producing submicron particles having Schottky barriers or pn-hetero-barriers and distributing the particles so that the depletion regions then produced around neighbouring particles overlap. Such particles will then deplete the silicon material from electric charge carriers. The substrate material can then be processed using the standard silicon processing methods and allows integrated circuits to be manufactured which are suitable for high frequency applications. A silicon substrate is made by sputtering a metal such as Co in a silicon wafer and then silicidizing the sputtered Co atoms by means of an annealing treatment. A top silicon wafer having a silicon dioxide layer at its bottom surface is then bonded to the sputtered layer. Finally the top wafer is thinned to provide a layer thickness suitable for the processing steps required in the manufacture of components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.