Manufacturing method capable of preventing corrosion and contamination of MOS gate
US6187674A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 8, 1998 |
| Grant date | Feb 13, 2001 |
| Priority date | — |
| Expiry date | Dec 8, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/664
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A MOS gate manufacturing operation is capable of preventing acid corrosion and station contamination. The manufacturing method includes the steps of sequentially forming a polysilicon layer, a barrier layer, a silicide layer and a cap layer over a silicon substrate, and then etching to form a gate structure. Next, a rapid thermal process is carried out to form an oxide layer over the exposed sidewalls of the barrier layer. Finally, the substrate is cleaned following by the formation of a source/drain region having a lightly doped drain structure on each side of the gate. The thin oxide layer is capable of protecting the barrier layer against acid corrosion without causing any noticeable increase in gate conductivity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.