High density MOS-gated power device and process for forming same

US6188105A · kind A · utility

Assignee

• Intersil Corporation · US

Inventors

• Christopher Boguslaw Kocon · Mountain Top, US
• Jun Zeng · Torrance, US

Key dates

• Filing date: Apr 1, 1999
• Grant date: Feb 13, 2001
• Expiry date: Apr 1, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/256

Abstract

A high density MOS-gated device comprises a semiconductor substrate and a doped upper layer of a first conduction type disposed on the substrate. The upper layer comprises a heavily doped source region of the first conduction type and a doped well region of a second and opposite conduction type at an upper surface. The upper surface, which comprises a contact area for the source region, further includes a recessed portion that comprises a contact area for a heavily doped deep body region of the second conduction type in the upper layer underlying the recessed portion. The device further includes a trench gate disposed in the upper layer and comprising a conductive material separated from the upper layer by an insulating layer. A process for forming a high density MOS-gated device comprises providing a semiconductor substrate comprising a doped upper layer of a first conduction type. A doped well region of a second and opposite conduction type is formed in an upper surface of the upper layer, and a dopant of the first conduction type is implanted in the well region to form a heavily doped source region. A layer of nitride is formed on the upper surface of the upper layer, and the ni…