Self-reset flip-flop with self shut-off mechanism
US6188259A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 3, 1999 |
| Grant date | Feb 13, 2001 |
| Priority date | — |
| Expiry date | Nov 3, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356121
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An electronic system is described for a flip-flop circuit having a data input stage with a clock input and a data input, coupled to an output stage which generates at least one data output, a reset circuit coupled to said data output stage for resetting the logic state of the data outputs to a predetermined desired condition, and a shutoff circuit coupled to said data input stage blocking data input from being acted on by said data input stage. An alternate embodiment includes a data processing circuit with a feedback mechanism coupled with the reset circuit of the flip-flop which informs the flip-flop that data is no longer required.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.