Chaim Amir
13Patents
10h-index
17Co-inventors
58Inventor score
Filing activity: May 24, 1996 → Apr 2, 2000
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5825224A | Edge-triggered dual-rail dynamic flip-flop with self-shut-off mechanism | Electricity | 24 | Expired |
| US6043696A | Method for implementing a single phase edge-triggered dual-rail dynamic flip-flop | Electricity | 24 | Expired |
| US6536022B1 | Two pole coupling noise analysis model for submicron integrated circuit design verification | Physics | 22 | Expired |
| US6265923A | Dual rail dynamic flip-flop with single evaluation path | Electricity | 19 | Expired |
| US6121807A | Single phase edge-triggered dual-rail dynamic flip-flop | Electricity | 17 | Expired |
| US5920218A | Single-phase edge-triggered dual-rail dynamic flip-flop | Electricity | 14 | Expired |
| US5889417A | Apparatus and method for improving the noise immunity of a dynamic logic signal repeater | Electricity | 14 | Expired |
| US6222404A | Edge-triggered dual-rail dynamic flip-flop with an enhanced self-shut-off mechanism | Electricity | 12 | Expired |
| US6463574B1 | Apparatus and method for inserting repeaters into a complex integrated circuit | Physics | 12 | Expired |
| US5983013A | Method for generating non-blocking delayed clocking signals for domino logic | Electricity | 12 | Expired |
| US6188259A | Self-reset flip-flop with self shut-off mechanism | Electricity | 10 | Expired |
| US6018254A | Non-blocking delayed clocking system for domino logic | Electricity | 10 | Expired |
| US6239619A | Method and apparatus for dynamic termination logic of data buses | Physics | 8 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.