Method for fabricating a shallow trench isolation structure
US6190999A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 1998 |
| Grant date | Feb 20, 2001 |
| Priority date | — |
| Expiry date | Sep 14, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76224
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a shallow trench isolation (STI) structure includes a pad oxide layer and a hard masking layer are sequentially formed over a semiconductor substrate. A trench is formed in the substrate by patterning over the substrate. Then, the hard masking layer is removed to expose the pad oxide layer. An insulating layer is formed over the substrate to fill the trench. Using the pad oxide layer as a polishing stop, a CMP process is performed to polish the insulating layer until the pad oxide layer is exposed. The remained pad oxide within the trench is simultaneously planarized to have a planar top surface without dishing and microscratch. After the pad oxide is removed, the STI structure is accomplished.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.