Patent · US Expired

Process for producing multi-layer wiring structure

US6191031A · kind A · utility

14Cited by
3References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 14, 1999
Grant dateFeb 20, 2001
Priority date
Expiry dateSep 14, 2019

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2221/1036
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Upon forming a groove and a connection hole by a dual damascene process, there is a problem in that the connection hole has a bowing shape, and it is difficult to form a shape of the connection hole in a good and stable manner. A process for producing a multi-layer wiring structure is provided, which comprises a step of forming an inter level dielectric film 15 covering a lower layer wiring 14; a step of forming a connection hole 16 in the inter level dielectric film 15 to reach the lower layer wiring 14; a step of forming an inter metal dielectric film 17 filling the connection hole 16 on the inter level dielectric film 15, with an insulating material having an etching rate larger than an etching rate of the inter level dielectric film 15; and a step of forming a concave part 18 in the inter metal dielectric film 17, and selectively re-opening the connection hole 16 with respect to the inter level dielectric film in such a manner that the connection hole is continuous to the concave part 18.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.