System and method for detecting shorts, opens and connected pins on a printed circuit board using automatic test equipment
US6191570A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 1999 |
| Grant date | Feb 20, 2001 |
| Priority date | — |
| Expiry date | Jul 26, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3191
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for testing node isolation on a circuit board. The method utilizes an automated test system having a plurality of test channels, wherein each test channel has a digital driver with a first input and a first output, and a digital receiver with a second output and a second input. The second input of the receiver is coupled to the first output of the driver, to a number of switches, and to a test probe. The test probe is configured to couple the driver and receiver to one of a plurality of nodes on a circuit board. The number of switches are configured to selectively couple the first output and second input to ground. During a node isolation test, each node of a test node group is coupled to one of the test channels. But for a selected node of the test node group, each node of the test node group is coupled to ground via the number of switches of the test channels coupled to the nodes. Thereafter, a test signal is applied to the selected node via the digital driver of a first test channel which is coupled to the selected node. It is then determined if the digital receiver of the first test channel indicates that the selected node is coupled to ground, and whether the selected…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.