Semiconductor integrated circuit with protection circuit against electrostatic discharge
US6191633A · kind A · utility
8Cited by
9References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 9, 1998 |
| Grant date | Feb 20, 2001 |
| Priority date | — |
| Expiry date | Sep 9, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A Semiconductor integrated circuit with a protection circuit against electrostatic discharge. A clamping element is connected with MIS transistor to prevent the breakdown under the charged device model. A parasitic bipolar transistor, a MOS transistor or MIS transistor whose gate is composed of an insulating film thicker than that of the transfer gate, can be used as the clamping element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.