Input buffer/level shifter
US6191636A · kind A · utility
8Cited by
6References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 22, 1999 |
| Grant date | Feb 20, 2001 |
| Priority date | — |
| Expiry date | Sep 22, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018521
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit is presented comprising a first device and a second device. The first device may be configured to operate at a first supply voltage and may be configured to generate a pull-up signal in response to an input signal. The second device may be configured to operate at a second supply voltage. The second supply voltage may be lower than the first supply voltage. The second device may be configured to generate an output in response to (i) the input signal and (ii) the pull-up signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.