Flash EEPROM with on-chip erase source voltage generator
US6195291A · kind A · utility
8Cited by
2References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 24, 1996 |
| Grant date | Feb 27, 2001 |
| Priority date | — |
| Expiry date | Jul 24, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/147
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Flash EEPROM includes a negative voltage generator for generating a negative voltage to be supplied to control gate electrodes of memory cells for erasing the memory cells. The Flash EEPROM also has a first positive voltage generator for generating a first positive voltage, independent from an external power supply of the Flash EEPROM, to be supplied to source regions of the memory cells during erasing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.