Lightly positively doped silicon wafer anodization process
US6197654A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 21, 1998 |
| Grant date | Mar 6, 2001 |
| Priority date | — |
| Expiry date | Aug 21, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/96
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of anodizing a lightly doped wafer wherein there is provided a lightly p-typed doped silicon wafer having a frontside and a backside. A p-type region is formed on the backside doped sufficiently to avoid inversion to n-type when a later applied current density of predetermined maximum value is applied to the backside. The wafer is placed in the electrolyte of a chamber having an electrolyte and having a pair of electrodes, preferably platinum, on opposite sides of the wafer and in the electrolyte. The current of predetermined value is passed between the electrodes and through the wafer, the current being sufficient to cause pores to form on the frontside of the wafer. The chamber preferably has first and second regions, one of the electrodes being disposed in one of the regions and the other electrode being disposed in the other regions with the wafer hermetically sealing the first region from the second region. The predetermined value of current is from about 1 to about 100 milliamperes per square centimeter. The number of chamber regions can exceed two with each adjacent pair of regions hermetically separated by a wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.