High efficiency CMOS pump circuit
US6198340A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 8, 1999 |
| Grant date | Mar 6, 2001 |
| Priority date | — |
| Expiry date | Feb 8, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/073
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
In this invention a booster circuit is driven with two complimentary boost signals. The two boost signals produce two complimentary boosted signals that are connected to a pump circuit output by means of two pass gate circuits. The transistors in each pass gate are controlled such that one pass gate circuit conducts in a first half of a clock cycle and the second pass gate circuit conducts in a second half of a clock period. Each pass gate is driven such that the full boosted signal is transferred to the output of the pump circuit and is not diminished by a threshold voltage of the pass gate circuit. The efficiency of this design keeps the output capacitor charged to a value close to the average value of boosted signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.