Ming-Hung Wang
29Patents
9h-index
26Co-inventors
75Inventor score
Filing activity: Mar 30, 1998 → Dec 28, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7054178B1 | Datapath architecture for high area efficiency | Physics | 418 | Expired |
| US6343904B1 | Fastener assembly for preventing corotation during tightening | Mechanical Engineering; Lighting; Heating | 37 | Expired |
| US6130853A | Address decoding scheme for DDR memory | Physics | 25 | Expired |
| US6236504A | Method and device for adjusting eye range by means of displacements of prisms and ocular lenses | Physics | 20 | Expired |
| US6198340A | High efficiency CMOS pump circuit | Electricity | 18 | Expired |
| US7482884B2 | Ring oscillator with a two-stage phase blender for generating multi-phase clock signals | Electricity | 16 | Active |
| US7031219B2 | Internal power management scheme for a memory chip in deep power down mode | Physics | 13 | Expired |
| US7292083B1 | Comparator circuit with Schmitt trigger hysteresis character | Electricity | 11 | Expired |
| US7292494B2 | Internal power management scheme for a memory chip in deep power down mode | Physics | 9 | Expired |
| US7404116B2 | Semiconductor integrated circuit with full-speed data transition scheme for DDR SDRAM at internally doubled clock testing application | Physics | 9 | Expired |
| US7551018B2 | Decoupling capacitor circuit | Electricity | 5 | Active |
| US7796463B2 | Self-feedback control pipeline architecture for memory read path applications | Physics | 3 | Active |
| US7391656B2 | Self-feedback control pipeline architecture for memory read path applications | Physics | 3 | Active |
| US11183231B2 | Apparatus for enhancing prefetch access in memory module | Physics | 3 | Active |
| US7634698B2 | Semiconductor integrated circuit with full-speed data transition scheme for DDR SDRAM at internally doubled clock testing application | Physics | 2 | Active |
| US6856358B1 | Phase-increase induced backporch decrease (PIBD) phase recovery method for video signal processing | Electricity | 1 | Expired |
| US11437087B2 | Method and apparatus for accumulating and storing respective access counts of word lines in memory module | Physics | 1 | Active |
| US11250904B1 | DRAM with inter-section, page-data-copy scheme for low power and wide data access | Physics | 0 | Active |
| US11520934B2 | Method for preventing differential cryptanalysis attack | Physics | 0 | Active |
| US12002637B2 | Keyboard and key structure capable of displaying instant image | Electricity | 0 | Active |
| US11721390B2 | DRAM with inter-section, page-data-copy scheme for low power and wide data access | Physics | 0 | Active |
| US12426183B2 | Adjustable and changeable modular control panel | Electricity | 0 | Active |
| US9653148B1 | Multi-bank memory device and system | Physics | 0 | Active |
| US6922192B2 | Wide-range and balanced display position adjustment method for LCD controller | Physics | 0 | Expired |
| US11755685B2 | Apparatus for data processing in conjunction with memory array access | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.