Synchronous multilevel non-volatile memory and related reading method
US6198660A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 17, 2000 |
| Grant date | Mar 6, 2001 |
| Priority date | — |
| Expiry date | May 17, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The memory and method for reading include a synchronous multilevel non-volatile memory with cell addresses which define a pair of memory cells on different planes of the multilevel memory and plane addresses which define the plane on which the memory cell defined by a memory cell address is to be read. The memory and method include switching the plane address at a preset time interval after the switching of a memory address and at the highest possible switching frequency, and reading the content of a memory location, from the memory, which corresponds to the memory address on planes alternatively indicated by the switching of the plane address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.