Method of fabricating compound semiconductor devices using lift-off of insulating film
US6204102A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Dec 9, 1998 |
| Grant date | Mar 20, 2001 |
| Priority date | — |
| Expiry date | Dec 9, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/85
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method of forming a gate electrode of a compound semiconductor device includes forming a first insulating film pattern having a first aperture, forming a second insulating film pattern having a second aperture consisting of inverse V-type on the first insulating film pattern, forming a T-type gate electrode by depositing a conductivity film on the entire structure, removing a second insulating film pattern, forming a insulating spacer on a pole sidewall by etching a first insulating film pattern, and forming an ohmic electrode of the source and drain by self-aligning method using T-type gate electrode as a mask. Thereby T-type gate electrode of materials such as refractory metals can be prevented to be deteriorate because of high annealing, as well as it is stably formed, by using an insulating film. Ohmic metal and gate electrodes formed by self-aligning method can be prevented an interconnection by forming an insulating film spacer between these electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.