Process for forming a high density semiconductor device
US6204112A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 22, 1999 |
| Grant date | Mar 20, 2001 |
| Priority date | — |
| Expiry date | Jan 22, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/038
Abstract
A method for forming an integrated circuit device, and the product thereby produced, are disclosed. The disclosed method includes the steps of obtaining a substrate with a patterned gate conductor and cap insulator, forming a dielectric masking layer having at least one opening, and, using the opening in the dielectric masking layer as a mask, forming a trench capacitor which is self-aligned to the cap insulator edge. The method is particularly useful for a producing a DRAM device having a dense array region with self-aligned deep trench storage capacitors connected by buried straps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.