Method of fabricating an ETOX flash memory
US6211012A · kind A · utility
20Cited by
9References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2000 |
| Grant date | Apr 3, 2001 |
| Priority date | — |
| Expiry date | Feb 4, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/30
Abstract
A method of fabricating an ETOX flash memory. A low-resistance source line is formed on the substrate to string each source region in one source array by self-aligned process to substitute conventional buried source line. And at the same time, landing pads are formed on the each drain region by a self-aligned process to reduce the fabrication difficulty of the contact plug.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.