Patent · US Expired

Integrated circuit and method

US6211035A · kind A · utility

248Cited by
5References
4Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 9, 1999
Grant dateApr 3, 2001
Priority date
Expiry dateSep 9, 2019

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/31144
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A via etch to contact a capacitor with ferroelectric between electrodes together with dielectric on an insulating diffusion barrier includes two-step etch with F-based dielectric etch and Cl- and F-based barrier etch.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.