Semiconductor device and timing control circuit
US6212127A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2000 |
| Grant date | Apr 3, 2001 |
| Priority date | — |
| Expiry date | May 1, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Control on the speed of operation of a delay loop from the output of a variable delay circuit to a delay control input thereof is performed. For example, frequency-dividing circuits are respectively placed at the input and output of the variable delay circuit. A signal obtained by frequency-dividing a signal outputted from the variable delay circuit is supplied to one input of a phase comparator through a dummy delay circuit, and a signal obtained by frequency-dividing the input of the variable delay circuit is supplied to the other input of the phase comparator. Phase control is performed according to the result of comparison between the phases of both signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.