Methods and apparatus for handling and storing bi-endian words in a floating-point processor
US6212539A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 1998 |
| Grant date | Apr 3, 2001 |
| Priority date | — |
| Expiry date | Oct 10, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A floating-point unit of a computer includes a floating-point computation unit, floating-point registers and a floating-point status register. The floating-point status register may include a main status field and one or more alternate status fields. Each of the status fields contains flag and control information. Different floating-point operations may be associated with different status fields. Subfields of the floating-point status register may be updated dynamically during operation. The control bits of the alternate status fields may include a trap disable bit for deferring interruptions during speculative execution. A widest range exponent control bit in the status fields may be used to prevent interruptions when the exponent of an intermediate result is within the range of the register format but exceeds the range of the memory format. The floating-point data may be stored in big endian or little endian format.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.