Configuration of programmable logic devices with routing core generators
US6216259A · kind A · utility
30Cited by
12References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 7, 1998 |
| Grant date | Apr 10, 2001 |
| Priority date | — |
| Expiry date | Oct 7, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for configuration of a programmable logic device using routing cores. A program executing on a processor includes instructions that select functions to be provided by the programmable logic device. The instructions invoke functions from a library of logic and router core generators to define logic cores and router cores to intercouple the logic cores. From the logic and router core definitions, the program utilizes a bit-stream library to generate programming bits. The programmable logic device is then loaded with the programming bits by the program.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.