Embedded LSI having a FeRAM section and a logic circuit section

US6218197A · kind A · utility

Assignee

• NEC CORPORATION · JP

Inventor

• Naoki Kasai · Tokyo, JP

Key dates

• Filing date: Jun 29, 2000
• Grant date: Apr 17, 2001
• Expiry date: Jun 29, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B53/40

Abstract

An embedded LSI includes a FeRAM macro block and an associated logic circuit section. A hydrogen barrier layer covers the FeRAM macro block as a whole and exposes the logic circuit section. The edge of the hydrogen barrier layer overlies the peripheral circuit of the FeRAM macro block and the boundary separating the FeRAM macro block from the logic circuit section. The ferroelectric capacitor is protected by the hydrogen barrier layer against hydrogen during a hydrogen-annealing process.