Patent · US Expired

Structure for reducing cross-talk in VLSI circuits and method of making same using filled channels to minimize cross-talk

US6218631A · kind A · utility

76Cited by

15References

9Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Asmus Hetzel · Berlin, DE
Erich Klink · Schenefeld, DE
Juergen Koehl · Holzgerlingen, DE
Dieter Wendel · Schenefeld, DE
Parsotam T. Patel · Round Rock, US

Key dates

Filing date	Jul 14, 1998
Grant date	Apr 17, 2001
Priority date	—
Expiry date	Jul 14, 2018

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/3011
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A structure for reducing cross-talk in VLSI circuits is disclosed. By filling voltage and ground metal lines in free or unused channels of VLSI chips and connecting them efficiently to the regular power image of the chip, the line to line coupling through vertical layers is reduced almost to zero and in-layer line to line coupling is also drastically reduced.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.