Remanent memory device
US6218700A · kind A · utility
100Cited by
6References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 28, 1998 |
| Grant date | Apr 17, 2001 |
| Priority date | — |
| Expiry date | Oct 28, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
Abstract
A remanent, electrically programmable and erasable, memory device comprises of a MOS type transistor whose gate insulator contains charged mobile species is disclosed. The gate insulator is comprised transversely of a sandwich comprising at least five areas. Two intermediate areas have first band-gap values, and two endmost and a central areas have band gap values greater than the first values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.