Processor with decompressed video bus
US6219754A · kind A · utility
47Cited by
6References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 19, 1997 |
| Grant date | Apr 17, 2001 |
| Priority date | — |
| Expiry date | Dec 19, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0875
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dedicated bus between a central processing unit and a peripheral unit, such as a graphics controller driving a video display, provides enhanced capability in an environment in which signal processing occurs within the central processing unit. The dedicated bus relieves other data buses, such as the PCI bus, of the need to communicate large amounts of data, such as decompressed video data. The resulting system supports high bandwidth transmissions of decompressed video data, enabling high resolution 24 bit full motion video and multiple data stream video.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.