Method and apparatus for executing a flush RS instruction to synchronize a register stack with instructions executed by a processor
US6219783A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 1998 |
| Grant date | Apr 17, 2001 |
| Priority date | — |
| Expiry date | Apr 21, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4484
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor that is configured to execute a programmed flow of instructions is disclosed. The processor includes a register stack (RS). The register stack (RS) has a portion allocated for dirty registers. The processor also includes a register stack engine (RSE) to exchange information, in one of an instruction execution dependent and independent modes, between the RS and storage area. The processor also includes a flush control circuit to generate to the RSE, dependent of instruction execution a signal, in response to which, the RSE spills to the storage area all dirty registers, from the RS. A computer implemented method in a processor is also provided. The processor includes a register stack (RS) device that includes a portion allocated for dirty registers. The portion is defined by first and second physical register numbers. The processor further includes a register stack engine (RSE) to exchange information in one of an instruction execution dependent and independent modes between a storage area and the RS. The storage area is defined by first and second pointers. At step a, it is determined whether the first and second physical register numbers have a predetermined logical re…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.