Jonathan Ross
43Patents
17h-index
42Co-inventors
81Inventor score
Filing activity: Nov 1, 1996 → May 18, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6088780A | Page table walker that uses at least one of a default page size and a page size selected for a virtual address space to position a sliding field in a virtual address | Physics | 116 | Expired |
| US7613847B2 | Partially virtualizing an I/O device for use by virtual machines | Physics | 108 | Active |
| US6393544B1 | Method and apparatus for calculating a page table index from a virtual address | Physics | 84 | Expired |
| US6895491B2 | Memory addressing for a virtual machine implementation on a computer processor supporting virtual hash-page-table searching | Physics | 73 | Expired |
| US5940872A | Software and hardware-managed translation lookaside buffer | Physics | 67 | Expired |
| US6430670B1 | Apparatus and method for a virtual hashed page table | Physics | 66 | Expired |
| US7330942B2 | Method for efficient virtualization of physical memory in a virtual-machine monitor | Physics | 38 | Expired |
| US5915117A | Computer architecture for the deferral of exceptions on speculative instructions | Physics | 29 | Expired |
| US6219783A | Method and apparatus for executing a flush RS instruction to synchronize a register stack with instructions executed by a processor | Physics | 27 | Expired |
| US6115777A | LOADRS instruction and asynchronous context switch | Physics | 23 | Expired |
| US6367005B1 | System and method for synchronizing a register stack engine (RSE) and backing memory image with a processor's execution of instructions during a state saving context switch | Physics | 21 | Expired |
| US6216214A | Apparatus and method for a virtual hashed page table | Physics | 20 | Expired |
| US7996833B2 | Method and system for replacing instructions and instruction blocks in computer code | Physics | 20 | Active |
| US6665793B1 | Method and apparatus for managing access to out-of-frame Registers | Physics | 20 | Expired |
| US6941449B2 | Method and apparatus for performing critical tasks using speculative operations | Physics | 18 | Expired |
| US6505296B2 | Emulated branch effected by trampoline mechanism | Physics | 18 | Expired |
| US7213125B2 | Method for patching virtually aliased pages by a virtual-machine monitor | Physics | 17 | Expired |
| US7421689B2 | Processor-architecture for facilitating a virtual machine monitor | Physics | 15 | Active |
| US7340630B2 | Multiprocessor system with interactive synchronization of local clocks | Electricity | 14 | Expired |
| US6065114A | Cover instruction and asynchronous backing store switch | Physics | 12 | Expired |
| US9223600B1 | In-processor dynamic address redirection table for substituting instruction strings | Physics | 10 | Active |
| US7426728B2 | Reducing latency, when accessing task priority levels | Physics | 9 | Expired |
| US8091090B2 | Method for providing scratch registers for use by a virtual-machine monitor | Physics | 9 | Active |
| US7849327B2 | Technique to virtualize processor input/output resources | Physics | 8 | Active |
| US6408373B2 | Method and apparatus for pre-validating regions in a virtual addressing scheme | Physics | 8 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.