Bit synchronizers and methods of synchronizing and calculating error
US6223317A · kind A · utility
28Cited by
15References
59Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 28, 1998 |
| Grant date | Apr 24, 2001 |
| Priority date | — |
| Expiry date | Feb 28, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/10
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention includes bit synchronizers and methods of synchronizing and calculating error. One method of synchronizing with a data signal in accordance with the present invention includes providing a data signal having a first portion and a second portion, generating a timing signal, first adjusting the timing signal during the first portion of the data signal, accumulating a history value during the first portion of the data signal, and second adjusting the timing signal during a second portion of the data signal using the history.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.