Semiconductor device and method for manufacturing the same
US6225697A · kind A · utility
42Cited by
4References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 29, 2000 |
| Grant date | May 1, 2001 |
| Priority date | — |
| Expiry date | Mar 29, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device and a method for manufacturing like are provided in which wiring capacitance between adjacent wirings can be effectively reduced in a wiring structure having a dummy wiring required for planarization of an interlayer dielectric. In the semiconductor device of the present invention, a distance being approximately twice s large as a width of the wiring constituting a first wiring and a second wiring is kept between one side edge of the dummy wiring and a side edge of the first wiring as well as between another side edge of the dummy wiring and a side edge of the second wiring.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.