Structure and method for forming conductive members in an integrated circuit
US6228765A · kind A · utility
2Cited by
2References
17Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Dec 29, 1998 |
| Grant date | May 8, 2001 |
| Priority date | — |
| Expiry date | Dec 29, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76879
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention provides a method of forming conductive members in an integrated circuit comprising the steps of depositing a first dielectric layer on a substrate; depositing a first conductive layer; depositing a second dielectric layer; forming cavities extending at least partially through the first dielectric layer; forming a second conductive layer on internal surfaces of the cavities; and electrolytically depositing another conductive material within the cavities.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.