Ultra thin oxynitride and nitride/oxide stacked gate dielectrics fabricated by high pressure technology
US6228779A · kind A · utility
40Cited by
13References
11Claims
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Key dates
| Filing date | Nov 6, 1998 |
| Grant date | May 8, 2001 |
| Priority date | — |
| Expiry date | Nov 6, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A dense and stable dielectric layer of silicon nitride and silicon dioxide suitable for use in transistors of ULSI circuits is fabricated by a high pressure process in which a nitride layer is first formed on a surface of a silicon substrate and then a silicon dioxide layer is formed on the silicon surface under the nitride layer. By placing the nitride layer above the silicon dioxide and next to a doped polysilicon gate, diffusion of dopant ions such as boron from the gate into the silicon dioxide is reduced. As semiconductor devices are scaled down, the thermal budget required for the process steps is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.