Method of testing electrical characteristics of multiple semiconductor integrated circuits simultaneously
US6229329A · kind A · utility
25Cited by
2References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 26, 1998 |
| Grant date | May 8, 2001 |
| Priority date | — |
| Expiry date | Aug 26, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2886
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method of testing semiconductor integrated circuits comprises the step of simultaneously testing a plurality of semiconductor integrated circuit elements for electric characteristics by applying a voltage to the respective testing electrodes of the semiconductor integrated circuit elements. The simultaneous testing step includes the step of applying the voltage to the respective testing electrodes of the semiconductor integrated circuit elements via PTC elements provided for the semiconductor integrated circuit elements in a one-to-one relationship.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.