Deferred shading graphics pipeline processor

US6229553A · kind A · utility

Assignee

• Apple Computer Inc. · US

Inventors

• Jerome F. Duluk, Jr. · Palo Alto, US
• Richard E. Hessel · Pleasanton, US
• Vaughn T. Arnold · Scotts Valley, US
• Jack Benkual · Cupertino, US
• Joseph P. Bratt · San Jose, US
• George Cuan · Sunnyvale, US
• Stephen L. Dodgen · Pullman, US
• Emerson S. Fang · Fremont, US
• Zhaoyu Gong · Cupertino, US
• Thomas Y. Ho · Milpitas, US
• Hengwei Hsu · Fremont, US
• Sidong Li · Zhanjiang, CN
• Sam Ng · Fremont, US
• Matthew Nicholas Papakipos · Palo Alto, US
• Jason Redgrave · Mountain View, US
• Sushma S. Trivedi · Sunnyvale, US
• Nathan Tuck · Corvallis, US

Key dates

• Filing date: Aug 20, 1999
• Grant date: May 8, 2001
• Expiry date: Aug 20, 2019

Classification

• Technology area (CPC G): Physics
• CPC primary: G06T15/87
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Three-dimensional computer graphics systems and methods and more particularly to structure and method for a three-dimensional graphics processor and having other enhanced graphics processing features. In one embodiment the graphics processor is Deferred Shading Graphics Processor (DSGP) comprising an AGP interface, a command fetch decode (2000), a geometry unit (3000), a mode extraction (4000) and polygon memory (5000), a sort unit (6000) and sort memory (7000), a setup unit (8000), a cull unit (9000), a mode injection (10000), a fragment unit (11000), a texture (12000) and texture memory (13000) a phong shading (14000), a pixel unit (15000), a backend unit (1600) coupled to a frame buffer (17000). Other embodiments need not include all of these functional units, and the structures and methods of these units are applicable to other computational processes and systems as well as deferred and non-deferred shading graphical processors.