Method for quality and reliability assurance testing of integrated circuits using differential Iddq screening in lieu of burn-in
US6230293A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 1998 |
| Grant date | May 8, 2001 |
| Priority date | — |
| Expiry date | Jul 24, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3008
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for quality and reliability assurance testing a lot of fabricated ICs comprising the steps of testing the differential I.sub.ddq of a sample of ICs at a plurality of different voltages, burning-in a sample of ICs, and then testing the functionality of the sample of ICs. The method of the present invention enables the reliability of an entire lot of ICs to be tested by determining an effective screening voltage for differential I.sub.ddq testing of the ICs, thereby eliminating the need both to burn-in and conduct post burn-in testing of all future lots of the ICs. The method of the present invention also enables fabrication facilities and workers to be engaged in other tasks rather than testing of ICs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.