Inventor · Allentown, PA, US

Sailesh Chittipeddi

64Patents
19h-index
35Co-inventors
84Inventor score

Filing activity: Jun 26, 1990 → Apr 25, 2011

Most-cited inventions

PatentTitleAreaCited byStatus
US5918116A Process for forming gate oxides possessing different thicknesses on a semiconductor substrate Emerging Cross-Sectional Technologies 214 Expired
US6790757B1 Wire bonding method for copper interconnects in semiconductor devices Electricity 109 Expired
US5751065A Integrated circuit with active devices under bond pads Electricity 105 Expired
US5573965A Method of fabricating semiconductor devices and integrated circuits using sidewall spacer technology Electricity 80 Expired
US5972179A Silicon IC contacts using composite TiN barrier layer Electricity 70 Expired
US5986343A Bond pad design for integrated circuits Electricity 61 Expired
US5147820A Silicide formation on polysilicon Electricity 51 Expired
US6773994B2 CMOS vertical replacement gate (VRG) transistors Electricity 49 Expired
US5965903A Device and method of manufacture for an integrated circuit having a BIST circuit and bond pads incorporated therein Electricity 40 Expired
US6417087B1 Process for forming a dual damascene bond pad structure over active circuitry Electricity 39 Expired
US5891784A Transistor fabrication method Emerging Cross-Sectional Technologies 37 Expired
US6838769B1 Dual damascene bond pad structure for lowering stress and allowing circuitry under pads Electricity 30 Expired
US6017787A Integrated circuit with twin tub Electricity 28 Expired
US6191017A Method of forming a multi-layered dual-polysilicon structure Electricity 26 Expired
US6265890A In-line non-contact depletion capacitance measurement method and apparatus Physics 24 Expired
US6207547A Bond pad design for integrated circuits Electricity 24 Expired
US6246325A Distributed communications system for reducing equipment down-time Electricity 22 Expired
US5045486A Transistor fabrication method Electricity 20 Expired
US6472304B2 Wire bonding to copper Electricity 20 Expired
US6087732A Bond pad for a flip-chip package Electricity 19 Expired
US6503793B1 Method for concurrently forming an ESD protection device and a shallow trench isolation region Electricity 14 Expired
US7952206B2 Solder bump structure for flip chip semiconductor devices and method of manufacture therefore Electricity 14 Active
US6384452B1 Electrostatic discharge protection device with monolithically formed resistor-capacitor portion Electricity 12 Expired
US6556409B1 Integrated circuit including ESD circuits for a multi-chip module and a method therefor Electricity 12 Expired
US6187658A Bond pad for a flip chip package, and method of forming the same Electricity 12 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.