Semiconductor apparatus having elevated source and drain structure and manufacturing method therefor
US6232641A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 1999 |
| Grant date | May 15, 2001 |
| Priority date | — |
| Expiry date | May 28, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
Abstract
A semiconductor apparatus on which a MOS transistor having an elevated source and drain structure is formed is arranged to have a gate electrode which is formed on the surface of a silicon substrate through an insulating film. An elevated source film and an elevated drain film each having at least a surface portion constituted by a metal silicide film, being conductive and elevated over the surface of the silicon substrate are formed on a source region and a drain region on the surface of the silicon substrate. Thus, a MOS transistor having a structure in which the surfaces of the source region and the drain region are elevated over the surface of the silicon substrate is formed. A first gate-side-wall insulating film is formed on the side wall of the gate electrode of the MOS transistor and having a bottom surface formed apart from the surface of the silicon substrate. A second gate-side-wall insulating film is formed between the first gate-side-wall insulating film and the gate electrode and on the bottom surface of the first gate-side-wall insulating film. The portion formed on the bottom surface exists in an inner bottom surface portion of the bottom surface of the first gate-s…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.