Patent · US Expired

Method for marking a wafer without inducing flat edge particle problem

US6235637A · kind A · utility

8Cited by
12References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 15, 1999
Grant dateMay 22, 2001
Priority date
Expiry dateSep 15, 2019

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for marking a semiconductor wafer without inducing flat edge particles, using a laser scribing technique. The process begins by providing a semiconductor wafer having a marking area with a silicon top layer. The semiconductor wafer is coated with a photoresist layer. A volume of the photoresist layer and a volume of silicon top layer are removed corresponding to the intended marking. Optionally, the marking pattern can be further etched into the silicon top layer by anisotropic etching, using the photoresist layer as an etching mask. In another option, the laser scribing process can be set to scribe the marking pattern in the photoresist layer without scribing the silicon top layer. The marking pattern can then be anisotropically etched into the silicon top layer, using the photoresist layer as an etching mask. Alternatively, the photoresist layer can be patterned to form an opening in the photoresist layer over a marking area, thereby exposing the silicon top layer. The silicon top layer is then marked using a laser scribing technique, and the photoresist layer prevents contamination of the device areas of the wafer by the silicon particles generated by the laser scribing…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.