Integrated memory having a reference potential and operating method for such a memory
US6236607A · kind A · utility
6Cited by
4References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 18, 2000 |
| Grant date | May 22, 2001 |
| Priority date | — |
| Expiry date | May 18, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The memory has a control unit, which, in order to generate a common reference potential on the two bit lines, turns on the first switching element and the selection transistors of the two reference memory cells and, after a specific time period, turns off the selection transistors, while the first switching element remains in the on state and compensates for a potential difference between the two bit lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.