Method for manufacturing silicon carbide MOS semiconductor device including utilizing difference in mask edges in implanting
US6238980A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 30, 1999 |
| Grant date | May 29, 2001 |
| Priority date | — |
| Expiry date | Jun 30, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
Abstract
A method for manufacturing a SiC semiconductor device is provided in which a first conductivity type source region is formed by implanting impurity ions, using a mask provided by a pattern of an oxide film formed by thermally oxidizing a patterned polysilicon film, and a second-conductivity type base region is formed by implanting impurity ions, using a mask provided by a pattern of a polysilicon film from which the above oxide film is removed. Since the edge of the mask for forming the base region is located behind that of the mask for forming the source region due to the oxidation process, the second conductivity type base region and first conductivity type source region provide self-aligned impurity regions with uniform channel regions. Also, a polysilicon film that provides a gate electrode layer of the semiconductor device is subjected to thermal oxidation, so that the resulting oxide film provides an interlayer insulating film on the gate electrode layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.