Patent · US Expired

Method for wire bonding a chip to a substrate with recessed bond pads and devices formed

US6245598A · kind A · utility

19Cited by
3References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 6, 1999
Grant dateJun 12, 2001
Priority date
Expiry dateMay 6, 2019

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/30107
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for forming chip scale packages and devices formed by utilizing a wire bonding technique and an interposer board which has recessed peripheral regions are disclosed. In the method, an IC die is bonded on its active surface to an interposer which is constructed with a recessed peripheral regions equipped with interconnections such that shorter bond wires may be run between the IC die and the interposer. The interposer is further equipped, in a top planar surface, with a plurality of interconnections for the subsequently forming of solder balls for connecting to an outside circuit such as a printed circuit board. The present invention novel method further provides the benefit that the shorter wire bonds formed alleviate the wire sweep problem normally occurs in the plastic encapsulation process for such a package.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.