Method of manufacturing a nonvolatile memory

US6251729A · kind A · utility

Assignee

• U.S. Philips Corporation · US

Inventors

• Andreas Hubertus Montree · Leuven, BE
• Jurriaan Schmitz · Eindhoven, NL
• Pierre Hermanus Woerlee · Eindhoven, NL

Key dates

• Filing date: Dec 15, 1999
• Grant date: Jun 26, 2001
• Expiry date: Dec 15, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/017

Abstract

In a method of manufacturing a semiconductor device comprising a field-effect transistor and a non-volatile memory element at a surface of a semiconductor body, a first and a second active region of a first conductivity type are defined at the surface of the semiconductor body for the transistor and the memory element, respectively. The surface of the semiconductor body is subsequently coated with a first insulating layer providing a sacrificial gate dielectric of the transistor and a floating gate dielectric of the memory element, which first insulating layer is then covered by a silicon-containing layer providing a sacrificial gate of the transistor and a floating gate of the memory element. After formation of the sacrificial gate and the floating gate, the transistor and the memory element are provided with source and drain zones of a second conductivity type. In a next step, a dielectric layer is applied, which is removed over at least part of its thickness by means of a material removing treatment until the silicon-containing layer at the first and the second active region and is exposed, after which the silicon-containing first active region are removed, thereby forming a rec…