Hybrid sensor pixel architecture with gate line and drive line synchronization
US6252215A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 1998 |
| Grant date | Jun 26, 2001 |
| Priority date | — |
| Expiry date | Apr 28, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/803
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A pixel circuit construction for image sensing includes a photosensor, an amplifier, a selector switch and, and a reset switch. The amplifier may be a single polycrystalline silicon (channel) transistor for high gain. The selector switch may also be a single polycrystalline silicon (channel) transistor for high conductivity. The reset switch may a single amorphous crystalline silicon (channel) transistor for low leakage current. The photosensor and amplifier may be connected to a shared bias line or may be connected to separate bias and drive lines, respectively. The selector and reset switches may be connected to a shared data line or may be connected to separate data and reset lines, respectively. Laser crystallization and rehydrogenation techniques are well suited to obtaining devices described herein. Gate line and drive voltage line synchronization is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.