Patent · US Expired

Method of analyzing morphology of bulk defect and surface defect on semiconductor wafer

US6252228A · kind A · utility

0Cited by
3References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 3, 1998
Grant dateJun 26, 2001
Priority date
Expiry dateDec 3, 2018

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/67288
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of analyzing the morphology of bulk and surface defects on a semiconductor wafer includes: determining a location of the defects; marking an indication proximate the location; milling the wafer using the indication, to thereby make a specimen; and analyzing the specimen to obtain the defects' morphology. Bulk defects as deep 5-250 .mu.m can be detected and surface defects as deep as 10 .mu.m from the wafer's surface can be detected. Both morphology analyses preferably include using TEM (Transmission Electron Microscopy). The location determination for both defects preferably includes projecting a laser beam onto the wafer. By obtaining the morphology of the defects, the cause of failure due to the bulk defects and surface defects can accurately be investigated, increasing semiconductor devices' reliability.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.