Fault identification by voltage potential signature

US6252417A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Frederick G. Adams · Spring Lake Heights, US
• Robert Dean Adams · South Burlington, US
• Edmond S. Cooley · Lyme, US

Key dates

• Filing date: Apr 22, 1999
• Grant date: Jun 26, 2001
• Expiry date: Apr 22, 2019

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/2884
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A logic gate is provided that comprises a sensing circuit coupled to a test output and to an internal node of the logic gate. The sensing circuit is adapted to sense a voltage on the internal node and to output a signal indicating a level of the voltage. The sensing circuit is not used during normal operation of the logic gate and preferably comprises only a single FET that is directly coupled to both the internal node and to the test output. The logic gate also preferably comprises a pre-charge circuit for pre-charging the test output to a predetermined voltage level prior to testing. An IC chip may be formed from a plurality of the logic gates wherein each logic gate comprises a sensing circuit coupled to a test output and to an internal node of the logic gate. Each sensing circuit may be coupled to the same test output or to a unique test output for the sensing circuit's logic gate. The sensing circuits are not used during normal operation of the IC chip.