Nonvolatile memory and method for fabricating the same
US6255155A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 1999 |
| Grant date | Jul 3, 2001 |
| Priority date | — |
| Expiry date | Apr 21, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
Abstract
Nonvolatile memory and method for fabricating the same, which can prevent damages to a diffusion region between a selection transistor and a memory cell transistor and reduce a cell size, the nonvolatile memory including a semiconductor substrate having a selection transistor and a cell transistor defined thereon, a line form of a first selection gate line formed on the selection transistor region in one direction and a floating gate formed on the cell transistor region in a fixed pattern, an insulating film and a second gate line formed on the first selection gate line at fixed intervals, and an insulating film and a control gate line over the insulating film including the floating gate in a direction the same with the first gate line, impurity regions formed in one region in the semiconductor substrate on both sides of the control gate line and the first selection gate line, a first planar protection film having first contact holes one each to the first selection gate line and to the impurity region, a contact plug in the first contact hole, a conductive layer pattern in contact with the contact plug, a second planar protection film having a contact hole to the conductive layer p…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.