Method of forming contact for semiconductor device
US6255224A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 16, 1999 |
| Grant date | Jul 3, 2001 |
| Priority date | — |
| Expiry date | Aug 16, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/0335
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a contact for a dynamic random access memory device is disclosed. In this method, a first insulating layer is formed on a semiconductor substrate. First and second contact pads are formed in the first insulating layer and on a semiconductor substrate in such a manner that a top surface of the first insulating layer is higher than top surfaces of the contact pads. Then a second insulating layer is formed over the substrate, which layer shows a bad step coverage. The second insulating layer is etched until the surfaces of the first and second contact pads are exposed. Then a first conductive layer is formed over the entire surface of the semiconductor substrate, and the first conductive layer is flattened, leaving some thickness of the second insulating layer. Then a second conductive layer is formed over the first conductive layer, and the second and first conductive layers are sequentially etched using a bit line forming mask, to form a bit line. Under this condition, the first conductive layer on the first contact pad is over-etched to form an electrical insulation from the bit line. When forming the direct contacts of a cell region and a core region, the photo…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.