High current capacity semiconductor device housing
US6255722A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 1999 |
| Grant date | Jul 3, 2001 |
| Priority date | — |
| Expiry date | Jun 7, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device package is provided which can accommodate currents larger than those of similarly sized standard device packages such as the "TO-247" package. Higher currents are accommodated by allowing a larger semiconductor die to be mounted on the device's lead frame than can be mounted on a similarly sized standard package. An improved mold clamping area is also provided which reduces the area from which damaging moisture can enter the molded package and increases the distance required for moisture to contact the die. Clip arrangements are also provided to mount the device package to a circuit board or heat sink, thereby allowing the increased operating temperatures associated with the increased operating currents to be efficiently dissipated. The semiconductor device package has a lead frame having a large area paddle section and at least one leg extending therefrom, the lead frame being of substantially constant thickness, and the paddle section being continuous and free of openings therethrough. A semiconductor die is mounted to the paddle section of the lead frame, the semiconductor die occupying substantially all of the surface area of a side of the paddle section …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.